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 ICL3244
TM
Data Sheet
June 2000
File Number
4876
1Microamp, +3V to +5.5V, 250kbps, RS-232 Transceiver with Enhanced Automatic Powerdown
The Intersil ICL32XX devices are 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and enhanced automatic powerdown functions, reduce the standby supply current to a 1A trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This family is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. The ICL3244 is a 3 driver, 5 receiver device that provides a complete serial port suitable for laptop or notebook computers. It also includes a noninverting always-active receiver for "wake-up" capability. This device, features an enhanced automatic powerdown function which powers down the on-chip power-supply and driver circuits. This occurs when all receiver and transmitter inputs detect no signal transitions for a period of 30s. The ICL3244 powers back up, automatically, whenever it senses a transition on any transmitter or receiver input. Table 1 summarizes the features of the device represented by this data sheet, while Application Note AN9863 summarizes the features of each device comprising the ICL3244 3V family.
Features
* * * * * * * * * * * Manual and Enhanced Automatic Powerdown Features Drop in Replacement for MAX3244 Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V Latch-Up Free On-Chip Voltage Converters Require Only Four External 0.1F Capacitors Guaranteed Mouse Driveability Receiver Hysteresis For Improved Noise Immunity Guaranteed Minimum Data Rate . . . . . . . . . . . . 250kbps Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/s Wide Power Supply Range. . . . . . . . Single +3V to +5.5V Low Supply Current in Powerdown State . . . . . . . . . . 1A
Applications
* Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Cellular/Mobile Phones * Related Literature - Application Note AN9863, "3V to +5.5V, 250k-1Mbps, RS-232 Transmitters/Receivers"
Pinout
ICL3244 (SOIC, SSOP) TOP VIEW
C2+ 1 C2- 2 V3 28 C1+ 27 V+ 26 VCC 25 GND 24 C123 FORCEON 22 FORCEOFF 21 INVALID 20 R2OUTB 19 R1OUT 18 R2OUT 17 R3OUT 16 R4OUT 15 R5OUT
R1IN 4
Ordering Information
PART NO. ICL3244CA ICL3244CB TEMP. RANGE (oC) 0 to 70 0 to 70 PACKAGE 28 Ld SSOP 28 Ld SOIC PKG. NO. M28.209 M28.3
R2IN 5 R3IN 6 R4IN 7 R5IN 8 T1OUT 9 T2OUT 10 T3OUT 11 T3IN 12 T2IN 13 T1IN 14
NOTE: Most surface mount devices are available on tape and reel; add "-T" to suffix.
TABLE 1. SUMMARY OF FEATURES NO. OF MONITOR Rx. (ROUTB) 1 DATA RATE (kbps) 250 MANUAL POWERDOWN? Yes ENHANCED AUTOMATIC POWERDOWN FUNCTION? Yes
PART NUMBER ICL3244
NO. OF NO. OF Tx. Rx. 3 5
Rx. ENABLE FUNCTION? No
READY OUTPUT? No
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000
ICL3244 Pin Descriptions
PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT ROUTB INVALID FORCEON System Power Supply Input (3.0V to 5.5V). Internally Generated Positive Transmitter Supply (+5.5V). Internally Generated Negative Transmitter Supply (-5.5V). Ground Connection. External Capacitor (Voltage Doubler) is connected to this lead. External Capacitor (Voltage Doubler) is connected to this lead. External Capacitor (Voltage Inverter) is connected to this lead. External Capacitor (Voltage Inverter) is connected to this lead. TTL/CMOS Compatible Transmitter Inputs. RS-232 Level (Nominally 5.5V) Transmitter Outputs. RS-232 Compatible Receiver Inputs. TTL/CMOS Level Receiver Outputs. TTL/CMOS Level, Noninverting, Always Enabled Receiver Outputs. Active Low Output that indicates if no valid RS-232 levels are present on any receiver input. Active High Input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high). FUNCTION
FORCEOFF Active Low to Shut Down Transmitters and On-Chip Power Supply. This overrides any automatic circuitry and FORCEON (see Table 2).
Typical Operating Circuit
ICL3244
+3.3V + 26 0.1F C1 0.1F C2 0.1F 28 + 24 C1+ VCC 27 V+ 3 + C3 0.1F
C11 C2+ + 2 C214
ICL3244
VT1 T2 C4 0.1F + T1OUT T2OUT RS-232 LEVELS
T1IN 13 T2IN 12 T3IN 20 R2OUTB R1OUT R1 TTL/CMOS LOGIC LEVELS 18 R2OUT R2 17 R3OUT R3 16 R4OUT R4 15 R5OUT 23 22 FORCEOFF 21 INVALID GND 25 R5 FORCEON VCC TO POWER CONTROL LOGIC 5k 5k 5k 5k 5k 19 T3
9
10
11 T3OUT
4 R1IN
5 R2IN
6
R3IN
RS-232 LEVELS
7 R4IN
8 R5IN
4-2
ICL3244
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON. . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100 Moisture Sensitivity (see Technical Brief TB363) All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC, SSOP- Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25oC TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Automatic Powerdown Supply Current, Powerdown Supply Current, Automatic Powerdown Disabled
All RIN Open, FORCEON = GND, FORCEOFF = VCC FORCEOFF = GND All Outputs Unloaded, FORCEON = FORCEOFF = VCC
25 25 25
-
1.0 1.0 0.3
10 10 1.0
A A mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Input Logic Threshold High TIN, FORCEON, FORCEOFF TIN, FORCEON, FORCEOFF VCC = 3.3V VCC = 5.0V Input Leakage Current Output Leakage Current Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low VCC = 3.3V VCC = 5.0V Input Threshold High VCC = 3.3V VCC = 5.0V Input Hysteresis Input Resistance TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3k to Ground Full 5.0 5.4 V Full 25 25 25 25 25 25 -25 0.6 0.8 3 1.2 1.5 1.5 1.8 0.5 5 25 2.4 2.4 7 V V V V V V k TIN, FORCEON, FORCEOFF FORCEOFF = GND IOUT = 1.6mA IOUT = -1.0mA Full Full Full Full Full Full Full 2.0 2.4 0.01 0.05 0.8 1.0 10 0.4 V V V A A V V
VCC -0.6 VCC -0.1
4-3
ICL3244
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25oC (Continued) TEST CONDITIONS VCC = V+ = V- = 0V, Transmitter Output = 2V VOUT = 12V, VCC = 0V or 3V to 5.5V, Automatic Powerdown or FORCEOFF = GND TEMP (oC) Full Full Full MIN 300 TYP 10M 35 MAX 60 25 UNITS mA A
PARAMETER Output Resistance Output Short-Circuit Current Output Leakage Current MOUSE DRIVEABILITY Transmitter Output Voltage (Figure 11)
T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3k to GND, T1OUT and T2OUT Loaded with 2.5mA Each
Full
5
-
-
V
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to INVALID High Receiver Input Thresholds to INVALID Low INVALID Output Voltage Low INVALID Output Voltage High Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) Receiver or Transmitter Edge to Transmitters Enabled Delay (tWU) Receiver or Transmitter Edge to Transmitters Enabled Delay (tAUTOPWDN) TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay RL = 3k, CL = 1000pF, One Transmitter Switching Receiver Input to Receiver Output, CL = 150pF Normal Operation Normal Operation tPHL - tPLH tPHL - tPLH VCC = 3.3V, RL = 3k to 7k, Measured From 3V to -3V or -3V to 3V CL = 150pF to 1000pF CL = 150pF to 2500pF tPHL tPLH Full 25 25 25 25 25 25 25 25 250 6 4 500 0.15 0.15 200 200 100 50 8 30 30 kbps s s ns ns ns ns V/s V/s Note 2 Note 2 ICL3244 Powers Up (Figure 6) ICL3244 Powers Down (Figure 6) IOUT = 1.6mA IOUT = -1.0mA Full Full Full Full 25 -2.7 -0.3 VCC-0.6 1 2.7 0.3 0.4 V V V V s
25
-
30
-
s
25 Full
15
100 30
60
s s
Receiver Output Enable Time Receiver Output Disable Time Transmitter Skew Receiver Skew Transition Region Slew Rate
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model IEC1000-4-2 Contact Discharge IEC1000-4-2 Air Gap Discharge All Other Pins NOTE: 2. An "edge" is defined as a transition through the transmitter or receiver input thresholds. Human Body Model 25 25 25 25 >8 8 8 3 kV kV kV kV
4-4
ICL3244 Detailed Description
ICL32XX interface ICs operate from a single +3V to +5.5V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1F capacitors, feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to 12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC 3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 1Mbps. Transmitter inputs float if left unconnected, and may cause ICC increases. Connect unused inputs to GND for the best performance.
Charge-Pump
Intersil's new ICL32XX family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the 10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1F capacitors for the voltage doubler and inverter functions at VCC = 3.3V. See the "Capacitor Selection" section, and Table 3 for capacitor recommendations for other operating conditions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings.
Receivers
The ICL3244 contains both standard inverting, tri-stable receivers, and a single noninverting (monitor) receiver (denoted by the ROUTB label) that is always active, regardless of the state of any control lines. Both receiver types convert RS-232 signals to CMOS output levels and accept inputs up to 25V while presenting the required 3k to 7k input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers' Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. The inverting receivers disable during forced (manual) powerdown, but not during automatic powerdown (see Table 2). Conversely, the monitor receiver remains active even
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip 5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages.
TABLE 2. POWERDOWN LOGIC TRUTH TABLE RCVR OR XMTR EDGE WITHIN 30 SEC? ICL3244 NO NO YES YES NO NO X X H H H H H H L L H H L L L L X X Active Active Active Active High-Z High-Z High-Z High-Z Active Active Active Active Active Active High-Z High-Z Active Active Active Active Active Active Active Active No Yes No Yes No Yes No Yes L H L H L H L H Normal Operation (Enhanced Auto Powerdown Disabled) Normal Operation (Enhanced Auto Powerdown Enabled) Powerdown Due to Enhanced Auto Powerdown Logic Manual Powerdown RS-232 LEVEL PRESENT AT RECEIVER INPUT?
FORCEOFF FORCEON TRANSMITTER RECEIVER ROUTB INPUT INPUT OUTPUTS OUTPUTS OUTPUTS
INVALID OUTPUT
MODE OF OPERATION
ICL3244 - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN) X X NOTE: 3. Input is connected to INVALID Output. Note 3 Note 3 Note 3 Note 3 Active High-Z Active High-Z Active Active Yes No H L Normal Operation Forced Auto Powerdown
4-5
ICL3244
during manual powerdown making it extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral's protection diodes (see Figures 2 and 3). This renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in Figure 3.
VCC RXIN -25V VRIN +25V GND 5k RXOUT GND VROUT VCC
current required of 5V RS-232 devices. The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1A, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs three-state. Inverting receiver outputs may or may not disable in powerdown; refer to Table 2 for details. This micro-power mode makes this device ideal for battery powered and portable applications.
Software Controlled (Manual) Powerdown
The ICL3244 allows the user to force the IC into the low power, standby state, and utilizes a two pin approach where the FORCEON and FORCEOFF inputs determine the IC's mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between active and powerdown modes, under logic or software control, only the FORCEOFF input need be driven. The FORCEON state isn't critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over powerdown is desired, the user must strap FORCEON high to disable the enhanced automatic powerdown circuitry. ICL3244 inverting (standard) receiver outputs also disable when the device is in powerdown, thereby eliminating the possible current path through a shutdown peripheral's input protection diode (see Figures 2 and 3). Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature, enabling them to function as a manual SHUTDOWN input (see Figure 4).
FORCEOFF PWR MGT LOGIC FORCEON INVALID ICL3244
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC CURRENT FLOW VOUT = VCC
VCC
Rx POWERED DOWN UART Tx GND SHDN = GND OLD RS-232 CHIP
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL
VCC
TRANSITION DETECTOR TO WAKE-UP LOGIC VCC R2OUTB RX POWERED DOWN UART VOUT = HI-Z R2OUT TX T1IN T1OUT FORCEOFF = GND R2IN ICL3244 I/O UART CPU
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
With any of the above control schemes, the time required to exit powerdown, and resume transmission is only 100s. When using both manual and enhanced automatic powerdown (FORCEON = 0), the ICL3244 won't power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition occurs on a receiver or transmitter input. Figure 5 illustrates a circuit for
Powerdown Functionality
This 3V RS-232 interface device requires a nominal supply current of 0.3mA during normal operation (not in powerdown mode). This is considerably less than the 5mA to 11mA
4-6
ICL3244
ensuring that the ICL3244 powers up as soon as FORCEOFF switches high. The rising edge of the Master Powerdown signal forces the device to power up, and the ICL3244 returns to enhanced automatic powerdown mode an RC time constant after this rising edge. The time constant isn't critical, because the ICL3244 remains powered up for 30 seconds after the FORCEON falling edge, even if there are no signal transitions. This gives slow-to-wake systems (e.g., a mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems remain enabled. block. INVALID can also be used to indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND (as in the case of a powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using this device which features an enhanced automatic powerdown function. When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter nor receiver inputs for 30 seconds, the charge pump and transmitters powerdown, thereby reducing supply current to 1A. The ICL3244 automatically powers back up whenever it detects a transition on one of these inputs. This automatic powerdown feature provides additional system power savings without changes to the existing operating system. Enhanced automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON high disables automatic powerdown, but manual powerdown is always available via the overriding FORCEOFF input. Table 2 summarizes the enhanced automatic powerdown functionality.
FORCEOFF
POWER MANAGEMENT UNIT
MASTER POWERDOWN LINE 0.1F 1M
FORCEOFF
FORCEON
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP WHEN EXITING FORCED POWERDOWN
INVALID Output
The INVALID output always indicates (see Table 2) whether or not 30s have elapsed with invalid RS-232 signals (see Figures 6 and 8) persisting on all of the receiver inputs,
VALID RS-232 LEVEL - INVALID = 1 2.7V INDETERMINATE 0.3V INVALID LEVEL - INVALID = 0 -0.3V INDETERMINATE -2.7V VALID RS-232 LEVEL - INVALID = 1
T_IN
EDGE DETECT S 30s TIMER EDGE DETECT R AUTOSHDN
R_IN
FORCEON
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Figure 7 illustrates the enhanced powerdown control logic. Note that once the ICL3244 enters powerdown (manually or automatically), the 30 second timer remains timed out (set), keeping the ICL3244 powered down until FORCEON transitions high, or until a transition occurs on a receiver or transmitter input. The INVALID output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 30s (see Figure 8), but this has no direct effect on the state of the ICL3244 (see the next sections for methods of utilizing INVALID to power down the device). INVALID switches high 1s after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. The time to recover from automatic powerdown mode is typically 100s.
giving the user an easy way to determine when the interface block should power down. Invalid receiver levels occur whenever the driving peripheral's outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface
4-7
ICL3244
RECEIVER INPUTS TRANSMITTER INPUTS TRANSMITTER OUTPUTS tINVH INVALID OUTPUT tINVL tAUTOPWDN V+ VCC 0 VtWU tAUTOPWDN tWU
} INVALID REGION
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, AND INVALID TIMING DIAGRAMS
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn't desired, the user can implement the standard automatic powerdown feature (mimics the function on the ICL3221/23/43) by connecting the INVALID output to the FORCEON and FORCEOFF inputs, as shown in Figure 9. After 30s of invalid receiver levels, INVALID switches low and drives the ICL3244 into a forced powerdown condition. INVALID switches high as soon as a receiver input senses a valid RS-232 level, forcing the ICL3244 to power on. See the "INVALID DRIVING FORCEON AND FORCEOFF" section of Table 2 for an operational summary. This operational mode is perfect for handheld devices that communicate with another computer via a detachable cable. Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232 level), causing the 30s timer to time-out and drive the IC into powerdown. Reconnecting the cable restores valid levels, causing the IC to power back up.
FORCEON FORCEOFF
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable cable, connecting INVALID to FORCEOFF (with FORCEON = 0) may be a desirable configuration. While the cable is attached INVALID and FORCEOFF remain high, so the enhanced automatic powerdown logic powers down the RS232 device whenever there is 30 seconds of inactivity on the receiver and transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID switches low and forces the RS-232 device to power down. The ICL3244 remains powered down until the cable is reconnected (INVALID = FORCEOFF = 1) and a transition occurs on a receiver or transmitter input (see Figure 7). For immediate power up when the cable is reattached, connect FORCEON to FORCEOFF through a network similar to that shown in Figure 5.
Capacitor Selection
The charge pumps require 0.1F capacitors for 3.3V operation. For other supply voltages refer to Table 3 for capacitor values. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1's value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors).
TABLE 3. REQUIRED CAPACITOR VALUES VCC (V) 3.0 to 3.6 4.5 to 5.5 C1 (F) 0.1 0.047 0.1 C2, C3, C4 (F) 0.1 0.33 0.47
INVALID I/O UART CPU
ICL3244
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
3.0 to 5.5
4-8
ICL3244
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor's equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.
6 TRANSMITTER OUTPUT VOLTAGE (V) 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0 1 2 3 4 5 6 7 8 9 10 VCC T2 ICL3244 T3 VOUT VOUT VCC = 3.0V T1 VOUT+ VOUT+
Power Supply Decoupling
In most circumstances a 0.1F bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting Powerdown
Figure 10 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3k in parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V.
LOAD CURRENT PER TRANSMITTER (mA)
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD CURRENT (PER TRANSMITTER, i.e., DOUBLE CURRENT AXIS FOR TOTAL VOUT+ CURRENT)
High Data Rates
The ICL3244 maintains the RS-232 5V minimum transmitter output voltages even at high data rates. Figure 12 details a transmitter loopback test circuit, and Figure 13 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 14 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver.
VCC 0.1F
5V/DIV
FORCEOFF T1
2V/DIV
+
T2 VCC = +3.3V C1 - C4 = 0.1F TIME (20s/DIV.) C1
+
C1+ C1-
VCC
V+
+ C3
ICL3244 + C2 C2TIN TOUT RIN 5k 1000pF C2+ VC4 +
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN
Mouse Driveability
The ICL3244 is specifically designed to power a serial mouse while operating from low voltage supplies. Figure 11 shows the transmitter output voltages under increasing load current. The on-chip switching regulator ensures the transmitters will supply at least 5V during worst case conditions (15mA for paralleled V+ transmitters, 7.3mA for single V- transmitter).
ROUT EN VCC SHDN OR FORCEOFF
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
4-9
ICL3244
5V/DIV. T1IN
T1OUT
R1OUT VCC = +3.3V C1 - C4 = 0.1F 5s/DIV.
FIGURE 13. LOOPBACK TEST AT 120kbps
5V/DIV. T1IN
T1OUT
R1OUT VCC = +3.3V C1 - C4 = 0.1F 2s/DIV.
FIGURE 14. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
The ICL3244 directly interfaces with most 5V logic families, including ACT and HCT CMOS. See Table 4 for more information on possible combinations of interconnections.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES SYSTEM POWER-SUPPLY VOLTAGE (V) 3.3 VCC SUPPLY VOLTAGE (V) 3.3
COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. Incompatible with AC, HC, or CD4000 CMOS.
5
5
5
3.3
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ICL3244 Typical Performance Curves
6 TRANSMITTER OUTPUT VOLTAGE (V) VOUT+ 4 20 2 1 TRANSMITTER AT 250kbps 1 OR 2 TRANSMITTERS AT 30kbps 0 -2 -4 -6 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) SLEW RATE (V/s) +SLEW
VCC = 3.3V, TA = 25oC
25
15 -SLEW
10 VOUT +SLEW 5 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF)
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE
FIGURE 16. SLEW RATE vs LOAD CAPACITANCE
3.5 45 3.0 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 40 35 30 25 120kbps 20 15 20kbps 10 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) 250kbps 2.5 2.0 1.5 1.0 0.5 0 2.5
NO LOAD ALL OUTPUTS STATIC
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
FIGURE 18. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
Die Characteristics
DIE DIMENSIONS: 100 mils x 127 mils (2550m x 3230m) METALLIZATION: Type: Metal 1: AISi (1%) Thickness: Metal 1: 8kA Type: Metal 2: AISi (1%) Thickness: Metal 2: 10kA SUBSTRATE POTENTIAL (POWERED UP): GND PASSIVATION: Type: Silox Thickness: 13kA TRANSISTOR COUNT: 1109 PROCESS: Si Gate CMOS
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ICL3244 Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.390 0.197 MAX 0.078 0.072 0.014 0.009 0.413 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 MAX 2.00 1.85 0.38 0.25 10.50 5.60 NOTES 9 3 4 6 7 8o Rev. 1 3/95
A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.292 0.022 28 0o 8o 0.322 0.037
0.65 BSC 7.40 0.55 28 0o 8.20 0.95
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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ICL3244 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M28.3 (JEDEC MS-013-AE ISSUE C) 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A A1
L
MILLIMETERS MIN 2.35 0.10 0.33 0.23 17.70 7.40 MAX 2.65 0.30 0.51 0.32 18.10 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.6969 0.2914
MAX 0.1043 0.0118 0.0200 0.0125 0.7125 0.2992
B C D E
A1 0.10(0.004) C
e H h L N
0.05 BSC 0.394 0.01 0.016 28 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 28 0o 10.65 0.75 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369
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